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Book Chapters
event | In Press |
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| - | Sang-Hoon Park, Myunghyun Alex Rhee, Sei Joon Kim, Eui-Young Chung, and Sungroh Yoon, "Solid State Disks - new storage devices for data centers," in Handbook on Data Centers, S. U. Khan and A. Y. Zomaya, Eds., Springer-Verlag, in press. |
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event | 2008 |
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| - | Eui-Young Chung, Luca Benini, Alessandro Bogliolo, and Giovanni De Micheli: "Dynamic Power Management for Nonstationary Service Requests," in The Most Influential Papers of 10 Years DATE, Edited by Lauwereins, Rudy; Madsen, Jan, Springer-Verilag, 2008. |
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| - | Yung-Hsiang Lu, Eui-Young Chung, Tajana Simunic, Luca Benini, and Giovanni De Micheli: "Quantitative Comparison of Power Management Algorithms," in The Most Influential Papers of 10 Years DATE, Edited by Lauwereins, Rudy; Madsen, Jan, Springer-Verilag, 2008. |
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International Journals
event | 2023 |
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| - | Young Min Park, Joonhyeok Yeom, Dohyun Kim, and Eui-Young Chung, "Unified Wear-leveling Technique for NVM-based Buffer of SSD," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol 42, pp. 5161-5165, Dec. 2023
[PDF] |
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| - | Duheon Choi, Taeyang Jeong, Joonhyeok Yeom, and Eui-Young Chung, "Operand-oriented Virtual Memory Support for Near-Memory," IEEE Transactions on Computers, vol. 72, pp. 2250-2263, Aug. 2023
[PDF] |
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| - | Sangwoo Han, Minjung Cho, Gi Lee and Eui-Young Chung, "Page Type aware Data Migration Technique for Read Disturb Management of NAND Flash Memory," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 31, pp. 591-595, April 2023
[PDF] |
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event | 2022 |
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| - | Jeongbin Kim, Yongwoon Song, Kyungseon Cho, Hyukjun Lee, Hongil Yoon, and Eui-Young Chung, "STT-MRAM based MultiContext FPGA for Multithreading Computing Environment," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 41, pp. 1330-1343, May. 2022
[PDF] |
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event | 2021 |
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| - | Yun-Seok Oh, and Eui-Young Chung, "Energy-Efficient Shared Cache Using Way Prediction Based on Way Access Dominance Detection," IEEE Access, vol. 9, pp. 155048 - 155057, Nov. 2021
[PDF] |
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| - | Kwangsu Kim, Byungha Joo, Young Min Park, Taeyang Jeong, Ki Tae Kim, and Eui-Young Chung, "Cross-Corner Delay Variation Model for Standard Cell Libraries," IEEE Access, vol. 9, pp. 72299-72315, May 2021
[PDF] |
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| - | Young Seo Lee, Eui-Young Chung, Young-Ho Gong, and Sung Woo Chung, "Quant-PIM:An Energy-efficient Processing-in-memory Accelerator for Layer-wise Quantized Neural Networks," IEEE EMBEDDED SYSTEMS LETTERS, Early Access
[PDF] |
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event | 2020 |
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| - | Taehee You, Sangwoo Han, Young Min Park, Hyuk-Jun Lee and Eui-Young Chung, "Multitoken-Based Power Management for NAND Flash Storage Devices," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 39, pp. 2898 - 2910, Oct. 2020
[PDF] |
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| - | Minsik Oh, Kwangsu Kim, Duheon Choi, Hyuk-Jun Lee and Eui-Young Chung, "per-Operation Reusability based Allocation and Migration Policy for Hybrid Cache," IEEE Transactions on Computers, vol. 69, pp. 158-171, Feb. 2020
[PDF] |
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event | 2019 |
|---|
| - | Myeongjin Kim, Wontaeck Jung, Hyuk-Jun Lee and Eui-Young Chung, "A Novel NAND Flash Memory Architecture for Maximally Exploiting Plane-Level Parallelism," IEEE Transactions on Very Large Scale Intergration(VLSI) Systems, vol. 27, pp. 1957-1961, Aug. 2019
[PDF] |
|---|
| - | Ho Hyun Shin and Eui-Young Chung, "In-DRAM Cache Management for Low Latency and Low Power 3D-Stacked DRAMs," micromachines, vol. 10 , article 124, pp. 1-15, Feb. 2019
[PDF] |
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| - | Juhyung Hong, Jeongbin Kim, Sangwoo Han, and Eui-Young Chung, "A Locality-Aware Compression Scheme for Highly Reliable Embedded Systems," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 38, pp. 453-465, Mar. 2019
[PDF] |
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event | 2018 |
|---|
| - | Juhyung Hong, Sangwoo Han Young Min Park, and Eui-Young Chung, "ICS: Interrupt-Based Channel Sneaking for Maximally Exploiting Die-Level Parallelism of NAND Flash-Based Storage Devices," IEEE Transactions on Very Large Scale Integration(VLSI) Systems, vol. 26, pp. 1802-1806, Sept. 2018
[PDF] |
|---|
| - | Byunghoon Lee, Kwangsu Kim and Eui-Young Chung, "Replacement Policy Adaptable Miss Curve Estimation for Efficient Cache Partitioning," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 37, pp. 445-457, Feb. 2018
[PDF] |
|---|
| - | Ho Hyun Shin, Young Min Park, Duheon Choi, Byoung Jin Kim, Dae-Hyung Cho and Eui-Young Chung, "EXTREME : Exploiting Page Table for Reducing Refresh Power of 3D-Stacked DRAM Memory," IEEE Transactions on Computers, vol. 67, pp. 32-44, Jan. 2018
[PDF] |
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event | 2017 |
|---|
| - | Jin-Young Kim, Tae-Hee You, Hyeokjun Seo, Sungroh Yoon and Eui-Young Chung, "An effective pre-store/pre-load method exploiting intra-request idle time of NAND flash-based storage devices," Microprocessors and Microsystems, vol. 50, pp. 222-236, May. 2017
[PDF] |
|---|
| - | Taehyun Kim, Jongbum Lim, Jinku Kim, Woo-Cheol Cho, Eui-Young Chung, and Hyuk-Jun Lee, "Scalable Bandwidth Shaping Scheme via Adaptively Managed Parallel Heaps in Manycore-Based Network Processors," ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 22, no. 4, article 59, May. 2017
[PDF] |
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event | 2016 |
|---|
| - | Hyunwook Joo and Eui-Young Chung, "DHL-cache: dynamic per history length adjustment for low-power L2 cache," IET Electronics Letters, vol. 52, no. 15, pp. 1297-1298, July. 2016
[PDF] |
|---|
| - | Jin-Young Kim, Sang-Hoon Park, Hyeokjun Seo, Ki-Whan Song, Sungroh Yoon, and Eui-Young Chung, "NAND Flash Memory With Multiple Page Sizes for High-Performance Storage Devices," IEEE Transactions on Very Large Scale Integration(VLSI) Systems, vol. 24, no. 2, pp. 764-768, Jan. 2016
[PDF] |
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event | 2014 |
|---|
| - | Yu-Liang Chou, Shaoshan Liu, Eui-Young Chung and Jean-Luc Gaudiot, "An Energy and Performance Efficient DVFS Scheme for Irregular Parallel Divide-and-Conquer Algorithms on the Intel SCC," IEEE Computer Architecture Letters, vol. 13, no. 1, pp. 13-16, Nov. 2014
[PDF] |
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| - | Seung Hun Kim, Sang Hyong Lee, Minje Jun, Byunghoon Lee, Won Woo Ro, Eui-Young Chung and Jean-Luc Gaudiot, "C-Lock: Energy Efficient Synchronization for Embedded Multicore Systems," IEEE Transactions on Computers, vol. 63, no. 8, pp. 1962-1974, Aug. 2014
[PDF] |
|---|
| - | Minje Jun, Won Woo Ro and Eui-Young Chung, "Exploiting Implementation Diversity and Partial Connection of Routers in Application-Specific Network-on-Chip Topology Synthesis," IEEE Transactions on Computers, vol. 63, no. 6, pp. 1433-1444, Jun. 2014 [PDF] |
|---|
| - | Sang-Hoon Park, Dong-gun Kim, Kwanhu Bang, Hyuk-Jun Lee, Sungjoo Yoo and Eui-Young Chung, "An Adaptive Idle-Time Exploiting Method for Low Latency NAND Flash-Based Storage Devices," IEEE Transactions on Computers, vol. 63, no. 5, pp. 1085-1096, May. 2014
[PDF] |
|---|
| - | Seunghak Yu, Sungroh Yoon, Eui-Young Chung, and Hyuk-Jun Lee, "Design of a bitmap-based QoS-aware memory controller for a packet memory," IEICE Electronics Express, Vol.11, No.5, pp. 1-12, Mar. 2014 [PDF] |
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event | 2013 |
|---|
| - | Yongkweon Jeon, Eesuk Jung, Hyeyoung Min, Eui-Young Chung, and Sungroh Yoon, "GPU-Based Acceleration of an RNA Tertiary Structure Prediction Algorithm," Computers in Biology and Medicine, vol. 43, no. 8, pp. 1011-1022, Sep. 2013
[PDF] |
|---|
| - | Kwanhu Bang, Dong-Gun Kim, Sang-Hoon Park, Eui-Young Chung and Hyuk-Jun Lee, "Application-aware design parameter exploration of NAND flash memory," Journal of Semiconductor Technology and Science, vol. 13, no. 4, pp. 291-302, Aug. 2013
[PDF] |
|---|
| - | Kwanhu Bang, Kyungil Im, Dong-gun Kim, Sang-Hoon Park, Hyuk-Jun Lee and Eui-Young Chung, "Power failure protection scheme for reliable high-performance solid state disks," IEICE Transactions on Information and Systems, vol. E96-D, no. 5, pp.1078-1085, May. 2013
[PDF] |
|---|
| - | Hyuk-Jun Lee, Seung-Chul Kim and Eui-Young Chung, "A low-power packet memory architecture with a latency-aware packet mapping method," IEICE Transactions on Information and Systems, vol. E96-D, no. 4, pp.963-966, Apr. 2013
[PDF] |
|---|
| - | Samkyu Won, Eui-Young Chung, Duckju Kim, Junseop Chung, Bongseok Han and Hyukjun Lee, "Page overwriting method for performance improvement of NAND flash memories," IEICE Electronics Express, vol. 10, no. 6, pp. 1-6, Mar. 2013
[PDF] |
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event | 2012 |
|---|
| - | Hyuk-Jun Lee, Woo-Cheol Cho and Eui-Young Chung, "Analytical Memory Bandwidth Model for Many-core Processor Based Systems," IEICE Electronic Express, vol. 9, no. 18, pp 1461-1466, Sep. 2012
[PDF] |
|---|
| - | Jae-Beom Lee, Myoung-Jin Kim, Sungroh Yoon and Eui-Young Chung, "Application-Support Particle Filter for Dynamic Voltage Scaling of Multimedia Applications," IEEE Transactions on Computers, vol. 61, no. 9, pp 1256-1269, Sep. 2012
[PDF] |
|---|
| - | Minje Jun, Deumji Woo and Eui-Young Chung, "Partial Connection-aware Topology Synthesis for On-Chip Cascaded Crossbar Network," IEEE Transactions on Computers, vol. 61, no. 1, pp. 73-86, Jan. 2012
[PDF] |
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event | 2010 |
|---|
| - | Minje Jun. and Eui-Young Chung, "Design of On-Chip Crossbar Network Topology using Chained Edge Partitioning," The Computer Journal, vol. 53, no.7, pp. 904-917, Sep. 2010
[PDF] |
|---|
| - | Donghwa Shin, Sung Woo Chung, Eui-Young Chung and Naehyuck Chang, "Energy-Optimal Dynamic Thermal Management: Computation and Cooling Power Co-Optimization," IEEE Transactions on Industrial Informatics, vol. 6, no.3, pp. 340-351, Aug. 2010
[PDF] |
|---|
| - | Dong Kim, Kwanhu Bang, Seung-Hwan Ha, Sungroh Yoon and Eui-Young Chung , "Architecture Exploration of High-Performance PCs with a Solid-State Disk," IEEE Transactions on Computers, vol. 59 , no. 7, pp. 878-890, Jul. 2010 [PDF] |
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| - | Do Yeun Kim, Chanik Park, Eui-Young Chung and Sung Woo Chung, "A Fast and Simple System Performance Emulator for Enhanced Solid State Disks: A Case Study of Long Read Operations," Journal of Zhejiang University SCIENCE C (Computer & Electronics), vol. 11, no. 6, pp. 418-424, Jun. 2010
[PDF] |
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| - | Joonho Kong, Johnsyk John, Eui-Young Chung, Sung Woo Chung and Jie Hu , "On the Thermal Attack in Instruction Caches," IEEE Transactions on Dependable and Secure Computing, vol. 7, no. 2, pp. 217-223, Jun. 2010
[PDF] |
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event | 2009 |
|---|
| - | Sam-Kyu Won, Seung-Hwan Ha and Eui-Young Chung, "Fast Performance Analysis of NAND Flash-Based Storage Device," IET Electronics Letters, vol. 45, no. 24, pp. 1219 - 1221, Nov. 2009
[PDF] |
|---|
| - | Taehoon Lee, Seung Jean Kim, Eui-Young Chung and Sungroh Yoon, "K-Maximin Clustering: A Maximin Correlation Approach to Partition-Based Clustering," IEICE Electronics Express, vol. 6, no. 17, pp. 1205-1211, Sep. 2009
[PDF] |
|---|
| - | Sung-Yong Bang, Kwanhu Bang, Sungroh Yoon and Eui-Young Chung, "Run-Time Adaptive Workload Estimation for Dynamic Voltage Scaling," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 28, no. 9, pp. 1334-1347, Sep. 2009
[PDF] |
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| - | Sang-Hoon Park, Seung-Hwan Ha, Kwanhu Bang and Eui-Young Chung, "Design and analysis of flash translation layers for multi-channel NAND flash-based storage devices," IEEE Transactions on Consumer Electronics, vol. 55, no. 3, pp. 1392 - 1400, Aug. 2009
[PDF] |
|---|
| - | Myeong-Jin Kim, Eui-Young Chung and Sungroh Yoon, "High-speed Post-layout Logic Simulation Using Quasi-static Clock Event Evaluation," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 28, no. 8, pp. 1274-1278, Aug. 2009
[PDF] |
|---|
| - | Minje Jun, Sungjoo Yoo and Eui-Young Chung, "Topology Synthesis of Cascaded Crossbar Switches," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 28, no. 6, pp. 926-930, Jun. 2009
[PDF] |
|---|
| - | Jinkyu Kim, Seunghak Yu, Byonghyo Shim, Hanjoo Kim, Hyeyoung Min, Eui-Young Chung, Rhiju Das and Sungroh Yoon, "A Robust Peak Detection Method for RNA Structure Inference by High-throughput Contact Mapping," Bioinformatics, vol. 25, no. 9, pp. 1137-1144, May. 2009
[PDF] |
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| - | Dong Kim, Kwanhu Bang, Seung-Hwan Ha, Chanik Park, Sung Woo Chung and Eui-Young Chung , "Solid-State Disk with Double Data Rate DRAM Interface for High-performance PCs," IEICE Transactions on Information & Systems, vol. E92-D, no. 4, pp. 727-731, Apr. 2009
[PDF] |
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| - | Jong-Ho Roh, Minje Jun, Kwanhu Bang and Eui-Young Chung , "Jitter-Conscious Bus Arbitration Scheme for Real-Time Systems," IEICE Transactions on Fundamentals, vol. E92-A, no. 2, pp. 643-647, Feb. 2009
[PDF] |
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event | 2008 |
|---|
| - | Yongsoo Joo, Yongseok Choi, Jaehyun Park, Chanik Park, Sung Woo Chung, Eui-Young Chung and Naehyuck Chang, "Energy and Performance Optimization of Demand Paging With OneNAND Flash," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 27, no. 11, pp. 1969-1982, Nov. 2008
[PDF] |
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| - | Hyung Beom Jang, Eui-Young Chung and Sung Woo Chung, "Adopting the Banked Register File Scheme for Better Performance and Less Leakage," ETRI Journal, vol. 30, no. 4, pp. 624-626, Aug. 2008
[PDF] |
|---|
| - | Soong Hyun Shin, Sung Woo Chung, Eui-Young Chung and Chu Shic Jhon, "Adopting the Drowsy Technique for Instruction Caches: A Soft Error Perspective," IEICE Transactions on Fundamentals, vol. E91-A, no. 7, pp. 1772-1779, Jun. 2008
[PDF] |
|---|
| - | Kwanhu Bang, Sung-Yong Bang and Eui-Young Chung, "Extended MPEG Video Format for Efficient Dynamic Voltage Scaling," IEICE Transactions on Fundamentals, vol. E91-A, no. 5, pp. 1283-1287, May. 2008
[PDF] |
|---|
| - | Hyuk-Jun Lee and Eui-Young Chung, "Scalable QoS-Aware Memory Controller for High-Bandwidth Packet Memory," IEEE Transactions on Very Large Scale Integration(VLSI) Systems, vol. 16, no. 3, pp. 289-301, Mar. 2008
[PDF] |
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event | 2007 |
|---|
| - | Sungroh Yoon, Jessica C Ebert, Eui-Young Chung, Giovanni De Micheli and Russ B Altman, "Clustering protein environments for function prediction: finding PROSITE motifs in 3D," BMC(BioMedCentral) Bioinformatics, vol. 8, , Suppl 4:S10, May. 2007
[PDF] |
|---|
| - | Eui-Young Chung, Hyuk-Jun Lee and Sung Woo Chung, "Scenario-aware Bus Functional Modeling for Architecture-level Performance Analysis," IEICE Transactions on Fundamentals, vol. E90-A, no. 4, pp. 875-878, Apr. 2007
[PDF] |
|---|
| - | Minje Jun, Kwanhu Bang, Hyuk-Jun Lee and Eui-Young Chung, "Latency-Aware Bus Arbitration for Real-Time Embedded Systems," IEICE Transactions on Information and Systems, vol. E90-D, no. 3, pp. 676-679, Mar. 2007
[PDF] |
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event | 2006 |
|---|
| - | Chang-Il Son, Sungroh Yoon, Sung Woo Chung, Chan Ik Park and Eui-Young Chung, "Variability-insensitive scheme for NAND Flash Memory Interfaces," IET Electronics Letters, vol. 42, no. 23, pp. 1335-1336, Nov. 2006
[PDF] |
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event | ~2005 |
|---|
| - | Eui-Young Chung, Luca Benini, Alessandro Bogliolo, Yung-Hsiang Lu and Giovanni De Micheli, "Dynamic Power Management for Nonstationary Service Requests," IEEE Transactions on Computers, vol. 51, no. 11, pp. 1345-1361, Nov. 2002
[PDF] |
|---|
| - | Eui-Young Chung, Luca Benini, Giovanni De Micheli, Gabrio Luculli and Marco Carilli, "Value-sensitive Automatic Code Specialization for Embedded Software," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 21, no. 9, pp. 1051-1067, Sep. 2002
[PDF] |
|---|
| - | Eui-Young Chung, Giovanni De Micheli, Marco Carilli, Luca Benini and Gabriele Luculli, "Value-based Source Code Specialization for Energy Reduction," ST Journal of System Research, vol. 3, no. 1, pp. 29-48, Apr. 2002
[PDF] |
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International Conferences
event | 2023 |
|---|
| - | Seong Jae Eom and Eui-Young Chung, "Adaptive Tag Comparison for Hybrid Cache," 2023 20th International SoC Design Conference(ISOCC), Jeju, Korea, Oct. 2023
[PDF] |
|---|
| - | Ki Tae Kim and Eui-Young Chung, "Brightness and Contrast Adaptive Face Recognition System," 2023 38th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), Jeju, Korea, Jun. 2023
[PDF] |
|---|
| - | Seung Jae Yong and Eui-Young Chung, "Virtual Memory Support for PIM with Table-based Management," 2023 38th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), Jeju, Korea, Jun. 2023
[PDF] |
|---|
| - | Youngju Woo and Eui-Young Chung, "DPU-based system evaluation with End-to-End Modular Simulation," 2023 38th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), Jeju, Korea, Jun. 2023
[PDF] |
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event | 2022 |
|---|
| - | W. Kim and E. -y. Chung, "Idle period frequency scaling to reduce dynamic power of display driver IC," 2022 37th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), Phuket, Thailand, 2022
[PDF] |
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event | 2021 |
|---|
| - | Sanghyup Lee, Kwangsu Kim, Jeongbin Kim, Dohyun Kim, and Eui-Young Chung, "Management of Cloud Data in Heterogeneously Integrated Main Memory," The Sixth International Conference on Consumer Electronics (ICCE) Asia, Gangwon province, Korea, Nov. 2021
[PDF] |
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event | 2020 |
|---|
| - | Dohyun Kim, Taeyang Jeong, and Eui-Young Chung, "Resource Utilization Optimized Design Method for Matched Filter of PSS Searcher," International SoC Design Conference (ISOCC), Yeosu, Korea, Oct. 2020
[PDF] |
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| - | Gi Lee, Byoung Jin Kim, and Eui-Young Chung, "Exploring Replacement Policy for Memcached," International SoC Design Conference (ISOCC), Yeosu, Korea, Oct. 2020
[PDF] |
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event | 2019 |
|---|
| - | Byoung Jin Kim, Taeyang Jeong and Eui-Young Chung, "Stockham FFT acceleration with Processing-in-Memory," The 34th International Technical Conference on Circuits/Systems, Computers and Communications(ITC-CSCC), Jeju, Korea, Jun. 2019
[PDF] |
|---|
| - | Sangwoo Han, Taeyang Jeong and Eui-Young Chung, "Multi-node PowerPerformance Modeling for HPC System," The 34th International Technical Conference on Circuits/Systems, Computers and Communications(ITC-CSCC), Jeju, Korea, Jun. 2019
[PDF] |
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event | 2018 |
|---|
| - | Taehee You, Hyeokjun Seo and Eui-Young Chung, "Weight-based Wear-leveling considering Performance in Phase Change Memory," 7th International Conference on Computer Technology and Science(ICCTS), Ho Chi Minh, Vietnam, Dec. 2018
[PDF] |
|---|
| - | Taeyang Jeong, Duheon Choi, Sangwoo Han and Eui-Young Chung, "A Study of Data Layout in Multi-channel Processing-In-Memory Architecture," The 7th International Conference on Software and Computer Applications(ICSCA), Kuantan, Malaysia, Feb. 2018
[PDF] |
|---|
| - | Young Min Park, Kwangsu Kim, Byoung Jin Kim and Eui-Young Chung, "Asymmetric Slew Logic Threshold Method on Near Threshold Region," The 7th International Conference on Software and Computer Applications(ICSCA), Kuantan, Malaysia, Feb. 2018
[PDF] |
|---|
| - | Jeongbin Kim, Ki Tae Kim and Eui-Young Chung, "CAD Tool Flow for Variation-Tolerant Non-Volatile STT-MRAM LUT based FPGA," The 7th International Conference on Software and Computer Applications(ICSCA), Kuantan, Malaysia, Feb. 2018
[PDF] |
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event | 2017 |
|---|
| - | Ho Hyun Shin and Eui-Young Chung, "Data Bus Management to Reduce Dynamic Power in DRAM Devices," The 32nd International Technical Conference on Circuit/Systems Computers and Communications(ITC-CSCC), Busan, Korea, pp 897-900, Jul. 2017
[PDF] |
|---|
| - | Hanjae Lee and Eui-Young Chung, "Overcoming Memory Bottleneck with Near-Data GPU Acceleration," The 32nd International Technical Conference on Circuit/Systems Computers and Communications(ITC-CSCC), Busan, Korea, pp 892-894, Jul. 2017
[PDF] |
|---|
| - | Ho Hyun Shin, Hyeokjun Seo, Byunghoon Lee, Jeongbin Kim and Eui-Young Chung, "Timing Window Wiper : A New Scheme for Reducing Refresh Power of DRAM," The 22nd Asia and South Pacific Design Automation Conference(ASP-DAC), Chiba/Tokyo, Japan, pp 133-138, Jan. 2017
[PDF] |
|---|
event | 2016 |
|---|
| - | Minsik Oh, Byunghoon Lee, Kwangsu Kim, and Eui-Young Chung, "Fully Dynamic Insertion and Promotion Policy," International Conference on Consumer Electronics-Asia (ICCE-Asia), 2016 International. IEEE, Seoul, Korea, Oct. 2016
[PDF] |
|---|
| - | Sangwoo Han, Hyeokjun Seo, ByoungJin Kim, and Eui-Young Chung, "PIM Architecture Exploration for HMC," Asia Pacific Conference on Circuits and Systems (APCCAS), 2016 International. IEEE, Jeju, Korea, pp 635-636, Oct. 2016
[PDF] |
|---|
| - | Taehee You, Jeongbin Kim, Minyoung Im, and Eui-Young Chung, "FPGA Power Estimation Simulator for Dynamic Input Data," SoC Design Conference (ISOCC), 2016 International. IEEE, Jeju, Korea, pp 363-364, Oct. 2016
[PDF] |
|---|
| - | JuHyung Hong, SangWoo Han, and Eui-Young Chung, "A RAM cache approach using host memory buffer of the NVMe interface," SoC Design Conference (ISOCC), 2016 International. IEEE, Jeju, Korea, pp 109-110, Oct. 2016
[PDF] |
|---|
| - | Byunghoon Lee, and Eui-Young Chung, "Efficient Way-based Cache Partitioning for Low-Associativity Cache," The 31st International Technical Conference on Circuit/Systems Computers and Communications (ITC-CSCC), Seoul, pp 563-565, Jul. 2016
[PDF] |
|---|
| - | Kwangsu Kim, Sangwoo Han, Young Min Park, Minyoung Im, and Eui-Young Chung, "Validating Log-normal Distribution of Delay Variability in Near-Threshold Design," The 31th International Technical Conference on Circuit/Systems Computers and Communications (ITC-CSCC), Seoul, pp 601-604, Jul. 2016
[PDF] |
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event | 2015 |
|---|
| - | Hyeokjun Seo, Eui-Young Chung, and Sungroh Yoon, "Execution Time Modeling for Heterogeneous Computing System," The 30th International Technical Conference on Circuit/Systems Computers and Communications (ITC-CSCC), Seoul, pp 563-565, Jul. 2015
[PDF] |
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event | 2014 |
|---|
| - | Sang-Hoon Park, and Eui-Young Chung, "Dual-Port Pre-emptive Cache Buffer Flushing for High Performance NAND Flash-based Storage Devices," The 29th International Technical Conference on Circuit/Systems Computers and Communications (ITC-CSCC), Thailand, pp 124-125, Jul. 2014
[PDF] |
|---|
| - | Jin-Young Kim, Sang-Hoon Park, Hyeokjun Seo, Taehee You and Eui-Young Chung, "A Wear-leveling Method for Balanced Multi-chip Life-time in NAND Flash-based Storage Devices," The 29th International Technical Conference on Circuit/Systems Computers and Communications (ITC-CSCC), Thailand, pp 161-162, Jul. 2014
[PDF] |
|---|
| - | Byunghoon Lee, Eui-Young Chung, and Hyuk-Jun Lee, "Voltage Islanding Technique for Concurrent Power and Temperature Optimization in 3D-stacked ICs," The 29th International Technical Conference on Circuit/Systems Computers and Communications (ITC-CSCC), Thailand, pp 267-269, Jul. 2014
[PDF] |
|---|
| - | Jae-Beom Lee, Myeongjin Kim, and Eui-Young Chung, "Schedule-aware DVFS Algorithm on Android Platforms for Energy Minimization," The 29th International Technical Conference on Circuit/Systems Computers and Communications (ITC-CSCC), Thailand, pp 287-288, Jul. 2014
[PDF] |
|---|
| - | Myeongjin Kim, Byunghoon Lee, Minsik Oh, and Eui-Young Chung, "Power-aware Event-driven Cache Partitioning for high performance chip multiprocessor," The 29th International Technical Conference on Circuit/Systems Computers and Communications (ITC-CSCC), Thailand, pp 557-559, Jul. 2014
[PDF] |
|---|
| - | Jin-Young Kim, Sang-Hoon Park, Hyeokjun Seo, Taehee You, and Eui-Young Chung, "A Read-while-write-based Out-of-order Scheduling for High Performance NAND Flash-based Storage Devices," The 18th IEEE International Symposium on Consumer Electronics, Korea, pp. 13-14, Jun. 2014
[PDF] |
|---|
| - | Sang-Hoon Park, Hyeokjun Seo, Taehee You, Jin-Young Kim, and Eui-Young Chung, "Wear-leveling Scheduler for Phase-Change RAM Main Memory for Mobile Consumer Electronics,” The 18th IEEE International Symposium on Consumer Electronics, Korea, pp. 278-280, Jun. 2014
[PDF] |
|---|
| - | Jae-Beom Lee, Myeongjin Kim, Seung Ryeol Yoo, and Eui-Young Chung, "Adaptive Power Management in LTE Terminal Modem,” The 18th IEEE International Symposium on Consumer Electronics, Korea, pp. 353-355, Jun. 2014
[PDF] |
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event | 2012 |
|---|
| - | Minje Jun, Myoung-Jin Kim, and Eui-Young Chung, "Asymmetric DRAM Synthesis for Heterogeneous Chip Multiprocessors in 3D-Stacked Architecture," International Conference on Computer-Aided Design (ICCAD), San Jose, California, USA, pp 73-80, Nov. 2012
[PDF] |
|---|
| - | Hyuk-Jun Lee, Seung-Cheol Kim and Eui-Young Chung, "Fast Correction of Multiple Soft Errors in Highly Associative Cache with CAM-Based Tag," CCIS(Communications in Computer and Information Science), Jeju, Korea, pp 424-431, Nov. 2012
[PDF] |
|---|
event | 2011 |
|---|
| - | Sam-Kyu Won, Yujong Noh, Hyunchul Cho, Jeil Ryu, Sungwook Choi, Sungdae Choi, Duckju Kim, Junseop Chung, Bongseok Han and Eui-Young Chung, "High-Voltage Wordline Generator for Low-Power Program Operation in NAND Flash Memories," Asian Solid-State Circuits Conference (A-SSCC), Jeju, Korea, pp 169-172, Nov. 2011
[PDF] |
|---|
| - | Kwanhu Bang, Sang-Hoon Park, Minje Jun. and Eui-Young Chung, "A Memory Hierarchy-Aware Metadata Management Technique for Solid State Disks," International Midwest Symposium on Circuits and Systems (MWSCAS), Seoul, Korea, pp 1-4, Aug. 2011
[PDF] |
|---|
event | 2010 |
|---|
| - | Minje Jun, Sungroh Yoon, and Eui-Young Chung, "Exploiting Multiple Switch Libraries in Topology Synthesis of On-Chip Interconnection Network," Design, Automation & Test in Europe (DATE), Dresden, Germany, pp. 1390-1395, Mar. 2010
[PDF] |
|---|
event | 2009 |
|---|
| - | Donghwa Shin, Jihun Kim, Jinhang Choi, Sung Woo Chung, Eui-Young Chung, and Naehyuck Chang, "Energy-Optimal Dynamic Thermal Management for Green Computing," International Conference on Computer-Aided Design (ICCAD), San Jose, California, USA, pp. 652-657, Nov. 2009
[PDF] |
|---|
event | 2008 |
|---|
| - | Jae-Beom Lee, Sung-Yong Bang, Nam-Deog Kim, Seung-Hwan Moon, Yong-Soon Lee, and Eui-Young Chung, "Table Lookup-based Power Estimation for LCD Panels," International Meeting on Information Display (IMID), Seoul, Korea, Vol. 8, Book-I, pp. 689-691, Oct. 2008
[PDF] |
|---|
| - | TaegHyun Kang, JunHyeong Ryu, MoonHo Kim, Eui-Young Chung and Donna Robinson-Hahn, "Self-Triggered SCR in Output Driver for Enhanced ESD Robustness," International Symposium on Power Semiconductor Devices and IC's (ISPSD), Orlando, Florida, USA, pp. 201-204, May. 2008
[PDF] |
|---|
| - | Do Yeun Kim, Jong Sung Lee, Chanik Park, Eui-Young Chung and Sung Woo Chung, "Fast Performance Estimation of Solid State Disk Reflecting Real Environments," International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Seattle, Washington, USA, , Mar. 2008
[PDF] |
|---|
| - | Minje Jun, Sungjoo Yoo and Eui-Young Chung, "Mixed Integer Linear Programming-based Optimal Topology Synthesis of Cascaded Crossbar Switches," Asia and South Pacific Design Automation Conference (ASP-DAC), Seoul, Korea, pp. 583-588, Jan. 2008
[PDF] |
|---|
| - | Eui-Young Chung, Cheol Hong Kim and Sung Woo Chung, "An Accurate and Energy-Efficient Way Determination Technique for Instruction Caches by Using Early Tag Matching," International Symposium on Electronic Design, Test & Applications (DELTA), Hong Kong, pp. 1-6, Jan. 2008
[PDF] |
|---|
event | 2007 |
|---|
| - | Joon Ho Kong, Eui-Young Chung, and Sung Woo Chung, "Energy-Efficient Soft Error Protection Utilizing Idle Resources," International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), Busan, Korea, pp. 100-101, Jun. 2007
[PDF] |
|---|
| - | Eui-Young Chung, Hyo Joong Suh, Cheol Hong Kim, and Sung Woo Chung, "Is the Complicated ECC Array Necessary for Data Caches?," International Conference on Computer Design (CDES), Las Vegas, Nevada, USA, pp. 137-139, Jun. 2007
[PDF] |
|---|
| - | Minje Jun, Kwanhu Bang, Hyuk-Jun Lee, Naehyuck Chang and Eui-Young Chung, "Slack-based Bus Arbitration Scheme for Soft Real-time Constrained Embedded Systems," Asia and South Pacific Design Automation Conference (ASP-DAC), Yokohama, Japan, pp. 159-164, Jan. 2007
[PDF] |
|---|
event | 2006 |
|---|
| - | Yongsoo Joo, Yongseok Choi, Chanik Park, Sung Woo Chung, Eui-Young Chung and Naehyuck Chang, "Demand Paging for OneNAND™ Flash eXecute-In-Place," International conference on Hardware/software codesign and system synthesis (CODES+ISSS), Seoul, Korea, pp. 229-234, Oct. 2006
[PDF] |
|---|
| - | Sungroh Yoon, Abhishek Garg, Eui-Young Chung, Hyun Seok Park, Woong Yang Park and Giovanni De Micheli, "Exploiting Binary Abstractions in Deciphering Gene Interactions," International Conference of the Engineering in Medicine and Biology Society (EMBS), New York City, New York, USA, pp. 5858-5863, Aug. 2006
[PDF] |
|---|
| - | Ikhwan Lee, Hyunsuk Kim, Peng Yang, Sungjoo Yoo, Eui-Young Chung, Kyu-Myung Choi, Jeong-Taek Kong and Soo-Kwan Eo, "PowerViP: Soc power estimation framework at transaction level," Asia and South Pacific Design Automation Conference (ASP-DAC), Yokohama, Japan, pp. 547-550, Jan. 2006
[PDF] |
|---|
| - | Jun-hee Yoo, Xingguang Feng, Kiyoung Choi, Eui-Young Chung and Kyu-Myung Choi, "Worst case execution time analysis for synthesized hardware," Asia and South Pacific Design Automation Conference (ASP-DAC), Yokohama, Japan, pp. 905-910, Jan. 2006
[PDF] |
|---|
event | ~2005 |
|---|
| - | Young-Taek Kim, Taehun Kim, Youngduk Kim, Chulho Shin, Eui-Young Chung, Kyu-Myung Choi, Jeong-Taek Kong and Soo-Kwan Eo, "Fast and Accurate Transaction Level Modeling of an Extended AMBA2.0 Bus Architecture," Design Automation and Test in Europe Conference and Exhibition (DATE), Munich, Germany, Vol. 1, pp. 138-139, Mar. 2005
[PDF] |
|---|
| - | Yongjin Ahn, Keesung Han, Junhee Yoo, Youngchul Cho, Jinyong Jung, Ganghee Lee, Kiyoung Choi, Eui-Young Chung and Kyu-Myung Choi, "An Interactive Environment for SoC Design Starting from KPN in SystemC," Global Signal Processing and Expo (GSPx), Santa Clara, California, USA, , Sep. 2004 |
|---|
| - | Young-Taek Kim, Chulho Shin, Eui-Young Chung, Kyu-Myung Choi, Jeong-Taek Kong and Soo-Kwan Eo, "Fast Exploration of Parameterized Bus Architecture for Communication-centric SoC Design," Design Automation and Test in Europe Conference and Exhibition (DATE), Paris, France, Vol. 1, pp. 352-357, Mar. 2004
[PDF] |
|---|
| - | Eui-Young Chung, Luca Benini and Giovanni De Micheli, "Contents provider-assisted dynamic voltage scaling for low energy multimedia applications," International Symposium on Low Power Electronics and Design (ISLPED), Monterey, California, USA, pp. 42-47, Aug. 2002
[PDF] |
|---|
| - | Eui-Young Chung, Luca Benini and Giovanni De Micheli, "Soruce code transformation based on software cost analysis," International Symposium on System Synthesis (ISSS), Montreal, Quebec, Canada, pp. 153-158, Sep. 2001
[PDF] |
|---|
| - | Eui-Young Chung, Luca Benini and Giovanni De Micheli, "Automatic source code specialization for energy reduction," International Symposium on Low Power Electronics and Design (ISLPED), Huntington Beach, California, USA, pp. 80-83, Aug. 2001
[PDF] |
|---|
| - | Eui-Young Chung, Luca Benini and Giovanni De Micheli, "Energy efficient source code transformation based on value profiling," International Workshop on Compilers and Operating Systems for Low Power (COLP), Philadelphia, Pennsylvania, USA, , Oct. 2000
[PDF] |
|---|
| - | Yung-Hsiang Lu, Eui-Young Chung, Tajana Simunic, Luca Benini and Giovanni De Micheli, "Quantitative comparison of power management algorithms," Design Automation and Test in Europe Conference and Exhibition (DATE), Paris, France, pp. 20-26, Mar. 2000
[PDF] |
|---|
| - | Eui-Young Chung, Luca Benini and Giovanni De Micheli, "Dynamic power management using adaptive learning tree," International Conference on Computer-Aided Design (ICCAD), San Jose, California, USA, pp. 274-279, Nov. 1999
[PDF] |
|---|
| - | Eui-Young Chung, Luca Benini, Alessandro Bogliolo and Giovanni De Micheli, "Dynamic Power Management for Nonstationary Service Requests," Design Automation and Test in Europe Conference and Exhibition (DATE), Munich, Germany, pp. 77-81, Mar. 1999
[PDF] |
|---|
| - | Hanbin Kim, Eui-Young Chung, Kyu-Myung Choi, Jeong-Taek Kong and Sang-Hoon Lee, "Timing verification with the non-periodic gated clocking," International Symposium on Circuits And Systems (ISCAS), Atlanta, Georgia, USA, Vol. 4, pp. 528-531, May. 1996
[PDF] |
|---|
| - | Eui-Young Chung, Byung-Ha Joo, Young-Keun Lee, Kyung-Ho Kim and Sang-Hoon Lee, "Advanced delay analysis method for submicron ASIC technology," ASIC Conference and Exhibit, Rochester, New York, USA, pp. 471-474, Sep. 1992
[PDF] |
|---|
Domestic Journals
event | 2016 |
|---|
| - | 원삼규, 정의영, "낸드 플래시 기반 저장장치의 피크 전류 모델링을 이용한 전력 최적화 기법 연구," 대한전자공학회지, Vol.53, no.1, pp. 43-50, Jan. 2016
[PDF] |
|---|
| - | 원삼규, 정의영, "TLC 낸드 플래시기반 저장 장치에서 페이지 중복쓰기 기법을 이용한 SLC 버퍼 성능향상 연구," 대한전자공학회지, Vol.53, no.1, pp. 36-42, Jan. 2016
[PDF] |
|---|
event | 2013 |
|---|
| - | 방관후, 박상훈, 이혁준, 정의영, "캐시 버퍼와 읽기 요청을 고려한 낸드 플래시 기반 솔리드 스테이트 디스크의 요청 스케줄링 기법," 대한전자공학회지, Vol.50, no.8, pp. 2071-2078, Aug. 2013
[PDF] |
|---|
| - | 방관후, 박상훈, 이혁준, 정의영, "논리 블록의 접근경향을 활용한 이종 낸드 플래시 기반 저장장치를 위한 Flash Translation Layer," 대한전자공학회지, Vol.50, no.5, pp. 1114-1121, May. 2013
[PDF] |
|---|
| - | 전민제, 정의영, "Mixed Integer Linear Programming을 이용한 온칩 크로스바 네트워크 토폴로지 합성," 대한전자공학회지, Vol.50, no.1, pp. 166-173, Jan. 2013
[PDF] |
|---|
event | 2010 |
|---|
| - | 방관후, 박상훈, 정의영, "NAND Flash Memory 기반 저장장치 기술 동향," 대한전자공학회지 Vol.37, no.3, pp. 21-30, Mar. 2010
[PDF] |
|---|
event | 2008 |
|---|
| - | 정의영, 유승주, "Research Challenges in Many-core SoC Designs," 한국통신학회지, 제25권 제12호, pp. 3-9, Dec. 2008
[PDF] |
|---|
| - | 최진항, 공준호, 정의영, 정성우, "온도 인지 마이크로프로세서를 위한 듀얼 레지스터 파일 구조," 정보과학회논문지 : 시스템 및 이론, 제 35 권 제 12 호, pp. 540-551, Dec. 2008
[PDF] |
|---|
| - | 김동, 방관후, 하승환, 정성우, 정의영, "PC향 SSD의 성능 분석을 위한 트랜잭션 수준 시뮬레이터," 대한전자공학회지, 제 45 권 SD 편 제 12 호, pp. 57-64, Dec. 2008
[PDF] |
|---|
event | 2007 |
|---|
| - | 주용수, 박재현, 정성우, 정의영, 장래혁, "Delayed Dual Buffering: Reducing Page Faults in Demand Paging for OneNAND Flash Memory," 대한전자공학회지, 44-SD권(집) 3호, pp. 43-51, Mar. 2007
[PDF] |
|---|
event | ~2005 |
|---|
| - | 이종은, 권우철, 김태훈, 정의영, 최규명, 공정택, 어수관, David Gwilt, "System Level Architecture Evaluation and Optimization: an Industrial Case Study with AMBA3 AXI," JSTS (Journal of Semiconductor Technology and Science), Vol. 5, No. 4, pp. 229-236, Dec. 2005
[PDF] |
|---|
| - | 김현숙, 김석훈; 이익환, 유승주, 정의영, 최규명, 공정택, 어수관, "An industrial case study of ARM926 EJ-S power modeling," JSTS (Journal of Semiconductor Technology and Science), Vol. 5, No. 4, pp. 221-228, Dec. 2005
[PDF] |
|---|
| - | 엄준형, 홍성백, 김영택, 정의영, 최규명, 공정택, 어수관, "ViP: a practical approach for HW/SW co-design," JSTS (Jounral of Semiconductor Technology and Science), Vol. 5, No. 2, pp. 89-101, Jun. 2005 (invited paper by winning Hynix prize in 12th Korea Semiconductor conference in Feb. 2005)
[PDF] |
|---|
| - | 최규명, 정의영, 엄준형, 어수관, "Platform을 기반으로 하는 SoC 설계 방법," 대한전자공학회지, Vol. 030, No. 09, pp. 934-941, Sep. 2003
[PDF] |
|---|
Domestic Conferences
event | 2023 |
|---|
| - | 김재현, 정의영, "Two-layer prediction model for efficient cache uses in Cloud Computing," 제 30회 한국반도체학술대회, Feb. 2023 [PDF] |
|---|
| - | 김상진, 이기, 김병진, 정의영, "BEPA: Bulk Erase based on Process Awareness for cloud SSD caches," 제 30회 한국반도체학술대회, Feb. 2023 [PDF] |
|---|
event | 2019 |
|---|
| - | 이지상, 정의영, "MLC 낸드플래시 메모리 기반 저장 장치의 효율적인 읽기방해 관리방안," 2019 SoC 학술대회, May. 2019 [PDF] |
|---|
event | 2018 |
|---|
| - | 염준혁, 정의영, "PCM/NAND 하이브리드 SSD를 위한 수명 관리 기법," 2018년도 대한전자공학회 추계학술대회, Nov. 2018 [PDF] |
|---|
| - | 전성식, 정의영, "낸드 플래시의 수명 향상을 위한 TLC/SLC 모드 전환 기술," 2018년도 SoC 학술대회, May 2018 [PDF] |
|---|
event | 2017 |
|---|
| - | 임민영, 김정빈, 유태희, 정의영, "A Technology Mapping Algorithm for MTJ-based LUT," 제 24회 한국반도체학술대회, Feb. 2017 [PDF] |
|---|
event | 2016 |
|---|
| - | 정원택, 정의영, "The Techniques for exploiting the plane-level parallelism in NAND Flash based Storage Device," 제 23회 한국반도체학술대회, Feb. 2016 [PDF] |
|---|
| - | 이한재, 서혁준, 정의영, "Memory System Architecture Using Hardware-based Page Replacement," 제 23회 한국반도체학술대회, Feb. 2016 [PDF] |
|---|
event | 2015 |
|---|
| - | 김광수, 한상우, 박영민, 임민영 정의영, "NTV 영역에서의 delay model과 parametric variations," 2015년도 대한전자공학회 추계학술대회, Nov. 2015 [PDF] |
|---|
| - | 권성두, 김명진, 정의영, "RGBW LED를 이용한 Color Sequential 디스플레이 장치의 전력 절감 기법," 2015년도 대한전자공학회 하계종합학술대회, pp 289-290, Jun. 2015
[PDF] |
|---|
event | 2013 |
|---|
| - | 이한울, 이병훈, 정의영, "미세 단위 클럭 조정을 통한 저전력 NoC 라우터 구조," 정보 및 제어 심포지엄 ICS 2013, Apr. 2013
[PDF] |
|---|
| - | 고석민, 서혁준, 박상훈, 정의영, "Hybrid Solid State Device의 Single-Level Cell 낸드 플래시 메모리의 효과적 활용을 위한 Flash Translation Layer," 반도체학술대회, Feb. 2013
[PDF] |
|---|
event | 2012 |
|---|
| - | 유승렬, 전민제, 이재범, 김명진, 정의영, "LTE 단말 모뎀에서의 적응형 전력 관리," 대한전자공학회 2012 하계종합학술대회, 제35권 1호, pp 68-71, Jun. 2012
[PDF] |
|---|
| - | 신용진, 전민제, 이병훈, 정의영, "비용 효율을 고려한 PoP 기반의 3D IC Architecture 연구," 대한전자공학회 2012 SoC 학술대회, April 2012
[PDF] |
|---|
event | 2011 |
|---|
| - | 김동건, 원삼규, 박상훈, 서혁준, 정의영, "낸드 플래시 메모리 기반 저장 장치를 위한 낸드 플래시 메모리의 사양 최적화," 대한전자공학회 2011 하계종합학술대회, 제34권 1호, pp. 324-327, Jun. 2011
[PDF] |
|---|
| - | 최영근, 방관후, 박상훈, 정의영, "White Box 접근 방법을 이용한 Solid-State Disk 특성 추출," 대한전자공학회 2011 하계종합학술대회, 제34권 1호, pp. 605-608, Jun. 2011
[PDF] |
|---|
| - | 이상형, 전민제, 이병훈, 정의영, "C-Lock: 멀티코어 임베디드 시스템을 위한 에너지와 성능 효율적 공유 데이터 동기화 기법," 대한전자공학회 2011 하계종합학술대회, 제34권 1호, pp. 368-371, Jun. 2011
[PDF] |
|---|
event | 2010 |
|---|
| - | 방관후, 정의영, "Solid-State Disk의 빠른 구조 탐색 및 최적화를 위한 상위 수준 시뮬레이션 환경," 대한전자공학회 2010 하계종합학술대회, 제33권 1호, pp. 1925-1928, Jun. 2010
[PDF] |
|---|
| - | 백제현, 이재범, 김명진, 정의영, "인지 품질을 고려한 MPEG Decoder에서의 DVFS 적용 기법," 대한전자공학회 2010 하계종합학술대회, 제33권 1호, pp. 1673-1674, Jun. 2010
[PDF] |
|---|
| - | 임경일, 박상훈, 원삼규, 방관후, 정의영, "Flash Translation Layer의 정량적 성능 예측 모델링," 대한전자공학회 2010 하계종합학술대회, 제33권 1호, pp. 780-783, Jun. 2010
[PDF] |
|---|
| - | 박상훈, 하승환, 방관후, 정의영, "낸드 플래시 메모리 기반 저성능 저장장치를 위한 Flash Translation Layer의 확장," 제17회 한국반도체학술대회, Feb. 2010
[PDF] |
|---|
| - | 이광준, 전민제, 정의영, "3차원 적층형 DRAM 의 성능 향상을 위한 데이터 배치 기법," 제17회 한국반도체학술대회, Feb. 2010
[PDF] |
|---|
event | 2009 |
|---|
| - | 정의석, 방관후, 윤성로, 정의영, "그래픽 프로세서 환경에서의 병렬 FP-growth 알고리즘 구현," 2009년도 대한전자공학회 추계학술대회, 제32권 2호, pp. 509-510, Nov. 2009
[PDF] |
|---|
| - | 하승환, 방관후, 전민제, 김동, 박상훈, 정의영, "정량적인 성능 평가를 위한 Solid-State Disk 시뮬레이션 환경 구축," 2009년도 대한전자공학회 하계종합학술대회, 제32권 제1호 pp. 488-489, Jun. 2009
[PDF] |
|---|
| - | 이상택, 전민제, 정의영, "주소 버스 공유를 통한 AXI 크로스바 스위치의 면적 및 전력 소모 감소," 제16회 한국반도체학술대회, Feb. 2009
[PDF] |
|---|
event | 2008 |
|---|
| - | 노종호, 정의영, "Mobile SoC에서의 Dual Port DRAM을 사용한 Performance 향상," 2008년도 대한전자공학회 하계종합학술대회, 제31권 제1호 pp. 533-534, Jun. 2008
[PDF] |
|---|
| - | 김동, 방관후, 정의영, "SSD의 PC적용을 위한 시스템 수준의 환경 구축," 2008년도 대한전자공학회 하계종합학술대회, 제31권 제1호 pp. 561-562, Jun. 2008
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| - | 방성용, 이재범, 정의영, "회기 분석 기법을 이용한 LCD 패널의 전력 소모 예측 시뮬레이터 개발," 2008년도 대한전자공학회 하계종합학술대회, 제31권 제1호 pp. 595-596, Jun. 2008
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| - | 김명진, 방성용, 정의영, 윤성로, "Synopsys Milkyway Database환경에서 구현된 Post-layout Gate-Level Logic Simulator," 2008년 SoC 학술대회, pp. 113-116, May 2008
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| - | 이상택, 전민제, 노종호, 조준동, 정의영, "마스터 인터페이스 간략화를 위한 트랜잭션 제약 기능 내장의 AXI 스위치 설계," 제15회 한국반도체학술대회, pp. 685-686, Feb. 2008
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event | 2007 |
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| - | 방관후, 김동, 정의영, "전송 수준 시스템 명세를 이용한 공유 버스 구조의 RTL 모델 자동 생성 기법," 전자공학회 하계학술대회, pp. 681-682, Jun. 2007
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event | ~2005 |
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| - | 김현숙, 김석훈; 이익환, 유승주, 정의영, 최규명, 공정택, 어수관, "An industrial case study of ARM926EJ-S power modeling," ISOCC (International SoC Design Conference), pp. 120-124, Oct. 2005
[PDF] |
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| - | 김식, 조광현, 임형준, 임경묵, 정의영, 최규명, 공정택, 어수관, "Multimedia IP Design in SystemC Design Environment Adopting High-level Code Optimization," ISOCC (International SoC Design Conference), pp. 24-27, Oct. 2005
[PDF] |
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| - | 이종은, 권우철, 김태훈, 정의영, 최규명, 공정택, 어수관, David Gwilt, "System Level Architecture Evaluation and Optimization: an Industrial Case Study with AMBA3 AXI," ISOCC (International SoC Design Conference), pp. 15-19, Oct. 2005
[PDF] |
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| - | 차치호, 홍성백, 박지연, 김효성, 김선택, 박찬익, 정의영, 최규명, 공정택, 어수관, "ViP (Virtual Platform) 설계 기법을 이용한 HS-MMC의 시스템 성능 개선," 한국반도체학술대회, 2004 |
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| - | 이강희, 조영철,서동관, 최기영, 정의영, "인터페이스 자동생성을 위한 IP 재사용 환경 및 사례 연구," SOC Design Conference, pp. 165-170, May 2004
[PDF] |
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| - | 안용진, 한기성, 조영철, 유준희, 정진용, 이강희, 최기영, 정의영, 최규명, "SoC 설계 공간 탐색을 위한 환경 개발," SOC Design Conference, pp. 238-244, May 2004
[PDF] |
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| - | 김시현, 설선미, 정의영, 최규명, 공정택, 어수관, "고속 아키텍쳐 탐색을 위한 transaction-level bus functional model 기법," SOC Design Conference, pp. 219-224, Nov. 2003
[PDF] |
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| - | Samvit Kaul, Sreekant M., Junhyung Um, Eui-Young Chung, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo, "Transaction-level modeling of MPEG2 Video Decode Application in SystemC 2.0.1," SOC Design Conference, pp. 899-903, Nov. 2003
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